| PART |
Description |
Maker |
| MM74C74N MM74C74 MM74C74M MM74C74MX |
Dual D Flip-Flop; Package: SOIC; No of Pins: 14; Container: Tape & Reel CMOS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
From old datasheet system
Dual D-Type Flip-Flop
|
Fairchild Semiconductor, Corp.
FAIRCHILD[Fairchild Semiconductor]
|
| CD4027BMS FN3302 CD4027 |
J-K Flop Flop, Master-Slave, Dual, Rad-Hard, CMOS, Logic
CMOS Dual J-K Master-Slave Flip-Flop
From old datasheet system
|
INTERSIL[Intersil Corporation]
|
| HCTS112MS HCTS112D HCTS112DMSR HCTS112HMSR HCTS112 |
Radiation Hardened Dual JK Flip-Flop HCT SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC16
|
Intersil, Corp.
INTERSIL[Intersil Corporation]
|
| MC100LVEL29DWR2 |
3.3V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset 100LVEL SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO20
|
ON Semiconductor
|
| 74AUP2G80GN 74AUP2G80GD |
Low-power dual D-type flip-flop; positive-edge trigger AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, INVERTED OUTPUT, PDSO8
Low-power dual D-type flip-flop; positive-edge trigger 低功耗双D型触发器;上升沿触
|
NXP Semiconductors N.V.
|
| 74AUP2G80GT 74AUP2G80GM 74AUP2G80DC 74AUP2G80 74AU |
Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT833-1 (XSON8U); Container: Reel Pack, SMD, 7" AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO8
|
PHILIPS[Philips Semiconductors]
NXP Semiconductors N.V.
|
| MC10H131FNG MC10H131FN MC10H13106 MC10H135FNG MC10 |
Dual D Type Master?Slave Flip?Flop
Dual D Type Master−Slave Flip−Flop
Dual J?K Master?Slave Flip?Flop
Universal Hexadecimal Counter
Four?Bit Universal Shift Register
Quad 2?Input Multiplexer (Non?Inverting)
12?Bit Parity Generator?Checker
Binary to 1?8 Decoder (Low)
Binary to 1?8 Decoder (High)
8?Line Multiplexer
8?Input Priority Encoder
5?Bit Magnitude Comparator
Dual Binary to 1?4?Decoder (High)
|
ONSEMI[ON Semiconductor]
|
| 74AUP2G80GD125 74AUP2G80GM125 |
Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT996-2 (XSON8U); Container: Reel Pack, Reverse, Reverse AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO8
Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT902-1 (XQFN8U); Container: Reel Pack, Reverse, Reverse
|
NXP Semiconductors N.V.
|
| 74LCX74SJ 74LCX74MX_NL 74LCX74 74LCX74BQX 74LCX74M |
Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs
Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs LVC/LCX/Z SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, QCC14
|
FAIRCHILD[Fairchild Semiconductor]
Fairchild Semiconductor, Corp.
|
| MC100ELT23 MC100EL12DTR2 MC10H131FNR2 MC100H640FNR |
5V Dual Differential PECL to TTL Translator
5V ECL Low Impedance Driver
Dual Type D Master-Slave Flip-Flop
ECL/TTL Clock Driver
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
3.3V / 5V ECL ÷4 Divider
Quad 2-Input NOR Gate
3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset
3.3V / 5V Hex Differential Line Receiver / Driver
3.3V / 5V Triple ECL Input to LVPECL/PECL Output Translator
|
ON Semiconductor
|
| MC100EP01 MC10EP445 MC10H172FNR2 MC100EL29 MC100H6 |
3.3V / 5V ECL 4-Input OR/NOR
3.3V / 5VECL 8-Bit Serial/Parallel Converter
Dual Binary 1-4-Decoder (High)
5V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset
9-Bit TTL-ECL Translator
Quad TTL-ECL Translator
Dual 2-Wide 2-3-Input OR-AND/OR-AND-Invert Gate
3.3V / 5V ECL 8-Bit Synchronous Binary Up Counter
3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
3.3V 10-bit LVTTL/LVCMOS to LVPECL Translator
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
5V ECL Voltage Controlled Oscillator
3.3V ECL D-Type Flip-Flop with Set and Reset
Binary to 1-8 Decoder (Low)
Differential -5V ECL To TTL Translator
-3.3V / -5V Triple ECL Input to PECL Output Translator
5V ECL Dual Differential 2:1 Multiplexer
Quad MSTR
5V ECL Quad 4-Input OR/NOR Gate
3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset
Dual 4-5-Input OR/NOR
|
ON Semiconductor
|
| 74HC74DR2 74HC74DR2G 74HC74D 74HC74 74HC74DTR2G 74 |
Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS
Dual D Flip-Flop with Set and Reset(带设置和复位的双D触发 双D触发器的设置和复位（带设置和复位的双触发器）
|
ONSEMI[ON Semiconductor]
|
